Chip Multiprocessor Platform for Ultra-Low-Power Data-Driven Networking System: ULP-DDNS

An ultra-low-power networking protocol handling platform is urgently required to realize sustainable ad hoc communication over battery-operated devices in emergent situations without connectivity to the wired network infrastructure. In this paper, the data-driven principle is fully exploited as a basis of ultra-low power because of its on-demand control by which circuits are activated only for processing without any additional controls resulting in power dissipation. Already our previous study reveals that the networking protocol handling contains several sequential processing parts which should be prevent from being the processing bottleneck by efficient instruction executions. This paper proposes an optimized circular pipeline scheme for power-performance-efficient instruction execution especially for the sequential parts, to realize the processor cores of the platform. Based on a prototype LSI implementation of the pipeline structure proposed, the power-performance estimation shows that the reduced amount of power consumption is approximately 33% at most in comparison with the existing circular pipeline structure.